Principal Analog Mixed Signal Engineer

About the Client Our client is a leading global engineering and technology services organization specializing in product engineering, digital transformation, semiconductor engineering, embedded systems, and next-generation technology solutions. The organization works with leading global technology and product companies across industries such as automotive, semiconductor, communications, consumer electronics, industrial automation, and other high-technology domains. With strong capabilities across the semiconductor product development lifecycle, the organization supports customers in areas including ASIC/SoC design, analog and mixed-signal engineering, embedded systems, verification, physical design, silicon validation, and product engineering.

About the Role We are looking for a highly experienced Principal Analog Mixed Signal Engineer with 12–18 years of relevant experience in Analog and Mixed Signal IC/ASIC/SoC development. The successful candidate will take ownership of Analog/Mixed Signal IP and subsystem development from architecture through silicon and production, including circuit design, verification, layout supervision, tape-out, silicon bring-up, characterization, and production support. This is a senior technical leadership position requiring a combination of: Deep hands-on Analog/Mixed Signal design expertise Strong understanding of semiconductor development methodologies Multiple successful silicon tape-outs End-to-end IP/SoC ownership Silicon validation and debugging experience Technical team leadership and mentoring Customer-facing communication Cross-functional collaboration The ideal candidate should be capable of making critical architectural and circuit-level decisions, driving technical reviews, mentoring senior engineers, and working directly with customers and internal engineering teams.

Key Responsibilities

1. Technical Leadership Own Analog/Mixed Signal IP and subsystem development from concept to production. Define system-level and block-level architecture for AMS solutions. Establish technical roadmaps, design methodologies, and development strategies. Lead architecture reviews, design reviews, and technical decision-making. Evaluate design trade-offs related to performance, power, area, reliability, and cost. Provide technical direction to Analog/Mixed Signal design engineers. Mentor and guide engineers across different experience levels. Establish and drive engineering best practices. Identify technical risks early and develop mitigation strategies. Drive continuous improvements in design quality, methodology, and productivity. Support project estimation, planning, technical reviews, and milestone tracking.

2. Analog & Mixed Signal Circuit Design The candidate should have strong hands-on experience designing and leading development of several Analog/Mixed Signal blocks, including: Clocking & Timing Circuits PLL DLL Oscillators Clock generation circuits Clock conditioning circuits Charge pumps Data Conversion ADC DAC Comparators References and bias circuits Power Management LDOs Bandgap references Power management circuits Bias generation Low-power analog circuits High-Speed & Interface Circuits High-speed interface analog blocks SerDes-related analog circuits PHY-related analog blocks MIPI / USB / PCIe / DDR PHY exposure Sensor & Monitoring Sensor interfaces Monitoring circuits Calibration circuits Detection and protection circuits The candidate should be comfortable working at both architecture and transistor/circuit levels, depending on project requirements.

3. End-to-End IP / SoC Product Ownership Take technical ownership across the complete Analog/Mixed Signal development lifecycle: Requirements → Architecture → Circuit Design → Simulation → Verification → Layout → Post-Layout → Signoff → Tape-out → Silicon Bring-up → Characterization → Production Responsibilities include: Analyze customer/product requirements. Perform feasibility studies and technical risk assessments. Define system and circuit architecture. Select appropriate circuit topologies and design approaches. Drive transistor-level implementation and optimization. Review simulation results and design margins. Ensure compliance with performance specifications. Coordinate with layout engineers and physical design teams. Supervise layout implementation and conduct layout reviews. Review parasitic extraction results. Drive post-layout simulation and closure. Ensure AMS signoff readiness. Participate in tape-out reviews and tape-out activities. Support silicon bring-up and debugging. Correlate pre-silicon simulations with silicon measurements. Drive characterization and performance analysis. Support production ramp-up, qualification, and yield improvement.

4. Analog/Mixed Signal Verification & Signoff The candidate will be responsible for establishing and driving robust AMS verification strategies. Key responsibilities include: Define verification strategy and acceptance criteria. Develop appropriate simulation plans for Analog/Mixed Signal blocks. Review simulation coverage and corner coverage. Perform and review: PVT analysis Corner analysis Monte Carlo analysis Mismatch analysis Noise analysis Reliability analysis Post-layout simulations Analyze process, voltage, and temperature variations. Ensure adequate design margins. Identify performance degradation caused by process variation and parasitics. Drive design closure against specifications. Support final AMS signoff and tape-out readiness.

5. Physical Verification & Layout Strong understanding of Analog IC physical implementation and verification is expected. The candidate should be able to effectively review and guide: Analog layout Matching-sensitive layouts Common-centroid structures Guard-ring strategies Power and ground implementation Noise isolation DRC LVS ERC Parasitic extraction Post-layout simulation Layout-dependent effects The role requires the ability to work closely with layout and physical design teams to achieve required performance, area, matching, reliability, and manufacturability targets.

6. Silicon Bring-Up & Validation A strong silicon background is essential for this role. Responsibilities include: Lead or support first-silicon bring-up. Develop silicon validation and characterization strategies. Debug silicon issues at the circuit/IP/system level. Correlate silicon measurements against simulation results. Identify root causes of silicon performance gaps. Recommend circuit/design corrections. Support engineering change and redesign activities where required. Analyze characterization data. Support yield improvement initiatives. Participate in product qualification and production ramp-up. Candidates with a strong record of taking Analog/Mixed Signal IPs from design through successful silicon will be highly preferred.

7. Customer & Cross-Functional Interaction The role involves significant interaction with customers and internal engineering organizations. The candidate will: Participate in customer technical discussions. Understand customer requirements and translate them into technical solutions. Present architecture and design approaches. Communicate technical risks, trade-offs, and project status. Participate in customer design reviews. Collaborate with: Digital Design RTL/Verification Physical Design Analog Layout Packaging DFT Test Engineering Product Engineering Silicon Validation Program/Project Management teams Resolve technical dependencies across engineering functions. Excellent technical communication and stakeholder management skills are therefore required.

Required Technical Skills Analog Design Tools Strong practical experience with industry-standard Analog/Mixed Signal design environments: Cadence Virtuoso Cadence Spectre / Spectre APS Cadence ADE XL Cadence ADE Explorer Cadence ADE Assembler HSPICE Preferred MATLAB Simulink

AMS Verification Skills Strong understanding and practical experience in: Analog/Mixed Signal verification Verilog-A Verilog-AMS Mixed-Signal simulation PVT analysis Corner analysis Monte Carlo simulation Mismatch analysis Noise analysis Reliability analysis Post-layout simulation AMS signoff

Physical Verification Skills Experience with: DRC LVS ERC Parasitic extraction RC extraction Post-layout simulation Layout review and closure

Process Technology Experience Experience across CMOS process technologies ranging from 180nm to advanced nodes. Strong understanding of process-related design considerations. Experience working with technology scaling and associated analog design challenges. Knowledge of FinFET technologies is an advantage. Understanding of process variation, device mismatch, parasitics, leakage, noise, and reliability considerations.

Preferred Technical Exposure Candidates with experience in one or more of the following areas will be preferred: SerDes MIPI USB PCIe DDR PHY High-speed interfaces Sensor interfaces Automotive electronics Industrial electronics Safety-critical semiconductor products Low-power Analog/Mixed Signal design Power management Productization Yield improvement

Functional Safety & Reliability Exposure to safety-critical semiconductor development is desirable. Preferred knowledge includes: ISO 26262 IEC 61508 Functional safety concepts Reliability-aware analog design Safety mechanisms Diagnostic/monitoring circuits Automotive semiconductor development processes

Scripting & Automation Exposure to engineering automation and scripting is an advantage. Preferred: Python Perl TCL Simulation automation Design-flow automation Regression automation

Required Qualifications B.E./B.Tech/M.E./M.Tech in: Electronics Engineering Electrical Engineering VLSI Microelectronics Electronics & Communication Engineering or a related engineering discipline. 12–18 years of relevant Analog/Mixed Signal IC design experience. Strong hands-on Analog/Mixed Signal circuit design experience. Proven experience with multiple successful silicon tape-outs. Strong experience across the ASIC/SoC development lifecycle. Experience in silicon bring-up and characterization. Ability to lead technical teams and drive design decisions. Strong customer-facing and cross-functional communication skills.

Ideal Candidate Profile The ideal candidate is a senior Analog/Mixed Signal technical leader who combines deep circuit-design expertise with end-to-end semiconductor product ownership. We are particularly interested in professionals who have: 12–18 years of AMS design experience Multiple successful tape-outs Strong transistor-level design expertise Experience owning AMS IP from architecture to silicon Strong Cadence Virtuoso/Spectre expertise Hands-on AMS verification experience Strong knowledge of PVT, Monte Carlo, mismatch, noise, and reliability analysis Experience with DRC/LVS/ERC and parasitic extraction Silicon bring-up and characterization experience Experience leading or mentoring engineering teams Customer-facing technical experience Exposure to automotive, industrial, or safety-critical products